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ARD2
1.00 for Rev B. Hardware
Airbag Reference Demonstrator using MPC5604P
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Fault Collection Unit driver. More...
Go to the source code of this file.
Data Structures | |
| union | FCUConfig_t |
Defines | |
| #define | TRUE (1u) |
| #define | CLEAR (0u) |
| #define | BITS_IN_NIBBLE (4u) |
| #define | BITS_IN_BYTE (8u) |
| #define | BYTES_IN_16 (2u) |
| #define | BYTES_IN_32 (4u) |
| #define | BIT_DEFINITION |
| #define | BIT0 (1u << 0u) |
| #define | BIT1 (1u << 1u) |
| #define | BIT2 (1u << 2u) |
| #define | BIT3 (1u << 3u) |
| #define | BIT4 (1u << 4u) |
| #define | BIT5 (1u << 5u) |
| #define | BIT6 (1u << 6u) |
| #define | BIT7 (1u << 7u) |
| #define | BIT8 (1u << 8u) |
| #define | BIT9 (1u << 9u) |
| #define | BIT10 (1u << 10) |
| #define | BIT11 (1u << 11) |
| #define | BIT12 (1u << 12) |
| #define | BIT13 (1u << 13) |
| #define | BIT14 (1u << 14) |
| #define | BIT15 (1u << 15) |
| #define | BIT16 (1u << 16) |
| #define | BIT17 (1u << 17) |
| #define | BIT18 (1u << 18) |
| #define | BIT19 (1u << 19) |
| #define | BIT20 (1u << 20) |
| #define | BIT21 (1u << 21) |
| #define | BIT22 (1u << 22) |
| #define | BIT23 (1u << 23) |
| #define | BIT24 (1u << 24) |
| #define | BIT25 (1u << 25) |
| #define | BIT26 (1u << 26) |
| #define | BIT27 (1u << 27) |
| #define | BIT28 (1u << 28) |
| #define | BIT29 (1u << 29) |
| #define | BIT30 (1u << 30) |
| #define | BIT31 (1u << 31) |
| #define | FCU_IS_IN_INIT (0x01u) |
| #define | FCU_IS_NORMAL (0x02u) |
| #define | FCU_IS_ALARMED (0x04u) |
| #define | FCU_IS_AT_FAULT (0x08u) |
| #define | FCU_LOCKED (0x10u) |
| #define | FCU_CORE_CHECKSTOP_MODE_ENTERED BIT0 |
| #define | FCU_CORE_RESET BIT1 |
| #define | FCU_LOSS_OF_XTAL BIT2 |
| #define | FCU_LOSS_OF_PLL0_LOCK BIT3 |
| #define | FCU_FREQ0_OUT_OF_RANGE BIT4 |
| #define | FCU_LOSS_OF_PLL1_LOCK BIT5 |
| #define | FCU_FREQ1_OUT_OF_RANGE BIT6 |
| #define | FCU_FLASH_FATAL_ERROR BIT7 |
| #define | FCU_WATCHDOG_RESET BIT8 |
| #define | FCU_JTAG_RESET BIT9 |
| #define | FCU_POWER_COMPARATOR_ERROR BIT10 |
| #define | FCU_LVD_4_5 BIT11 |
| #define | FCU_LVD_2_7_VREG BIT12 |
| #define | FCU_LVD_2_7_FLASH BIT13 |
| #define | FCU_LVD_2_7_I_0 BIT14 |
| #define | FCU_LVD_1_2_DIG BIT15 |
| #define | FCU_ERROR BIT31 |
| #define | FCU_SW_TRIGGERED_ERROR BIT30 |
| #define | FCU_CODE_FLASH_ECC_ERROR BIT29 |
| #define | FCU_DATA_FLASH_ECC_ERROR BIT28 |
| #define | FCU_SRAM_ECC_ERROR BIT27 |
| #define | FCU_CONFIG_ERROR BIT7 |
| #define | FCU_CONFIG_SW_TRIGGERED_ERROR BIT6 |
| #define | FCU_CONFIG_CODE_FLASH_ECC_ERROR BIT5 |
| #define | FCU_CONFIG_DATA_FLASH_ECC_ERROR BIT4 |
| #define | FCU_CONFIG_SRAM_ECC_ERROR BIT3 |
| #define | FCU_4MS_TIMEOUT 0xFFFFu |
| #define | N_ELEMENTS(X) (sizeof(X)/sizeof(*(X))) |
| #define | FCU_TIMEOUT(XX) (XX) |
| #define | FCU_TES0_ENABLED (0x80000000u) |
| #define | FCU_TES0_DISABLED (0x00000000u) |
| #define | FCU_TES1_ENABLED (0x40000000u) |
| #define | FCU_TES1_DISABLED (0x00000000u) |
| #define | FCU_TES2_ENABLED (0x20000000u) |
| #define | FCU_TES2_DISABLED (0x00000000u) |
| #define | FCU_TES3_ENABLED (0x10000000u) |
| #define | FCU_TES3_DISABLED (0x00000000u) |
| #define | FCU_TES4_ENABLED (0x08000000u) |
| #define | FCU_TES4_DISABLED (0x00000000u) |
| #define | FCU_ESF0_ENABLED (0x00800000u) |
| #define | FCU_ESF0_DISABLED (0x00000000u) |
| #define | FCU_ESF1_ENABLED (0x00400000u) |
| #define | FCU_ESF1_DISABLED (0x00000000u) |
| #define | FCU_ESF2_ENABLED (0x00200000u) |
| #define | FCU_ESF2_DISABLED (0x00000000u) |
| #define | FCU_ESF3_ENABLED (0x00100000u) |
| #define | FCU_ESF3_DISABLED (0x00000000u) |
| #define | FCU_ESF4_ENABLED (0x00080000u) |
| #define | FCU_ESF4_DISABLED (0x00000000u) |
| #define | FCU_ENABLE_CH(XX) ((XX)) |
| #define | FCU_TIMEOUT_CH(XX) ((XX) << 16u) |
| #define | FCU_NO_TEST_MODE 0x00u |
| #define | FCU_TEST_MODE_NO_PINS 0x400u |
| #define | FCU_TEST_MODE_WITH_PINS 0x800u |
| #define | FCU_OUTPUT_POL_NORMAL 0x0U |
| #define | FCU_OUTPUT0_INV_POL 0x100u |
| #define | FCU_OUTPUT1_INV_POL 0x200u |
| #define | FCU_OUTPUT_INV_POL 0x300u |
| #define | FCU_OUTPUT_IS_DUAL_RAIL 0u |
| #define | FCU_OUTPUT_IS_TIME_SWITCH 0x40u |
| #define | FCU_OUTPUT_IS_BISTABLE 0x80u |
| #define | FCU_OUTPUT_FREQ(XX) ((XX) & 0x7u) |
Functions | |
| uint8_t | u8fnFCUInit (FCUConfig_t *ptMyConfig) |
| Initializes the FCU based on pre-configured value. It does not lock it. | |
| uint8_t | u8fnFCUEnableConfig (void) |
| Launches the configuration loaded into the registers and locks it. | |
| uint8_t | u8fnFCUSMStatus (void) |
| Returns the value of the FCU State machine. | |
Fault Collection Unit driver.
Copyright (C) 2011 Freescale Semiconductor Freescale Confidential Proprietary
History:
| uint8_t u8fnFCUEnableConfig | ( | void | ) |
Launches the configuration loaded into the registers and locks it.
| Void |
| uint8_t u8fnFCUInit | ( | FCUConfig_t * | ptMyConfig | ) |
Initializes the FCU based on pre-configured value. It does not lock it.
| ptMyConfig,: | pointer to complete FCU configuration. |
| uint8_t u8fnFCUSMStatus | ( | void | ) |
Returns the value of the FCU State machine.
| Void |